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CoWoS is still sold out

Through mid-September TSMC’s advanced packaging was quoted with a year-long lead. The wafer is not the constraint. The stack is.

The Industrial Brief · Editorial · 22 September 2026 · 3 min

An advanced chip package on a green substrate, with a large central die flanked by four layered memory stacks, on a cream background
A chip package with a central processor and four memory stacks on a shared base. Illustrative. Illustration: The Industrial Brief (AI-generated)

A mid-September read of foundry allocation still had TSMC’s CoWoS advanced packaging sold out, with a lead time around a year. N3 families remain fully booked. New project kick-offs on those nodes have been described as suspended. That is not a surprise to anyone who has tried to buy an AI accelerator this year. It is still the fact that should sit on a hardware plan: the logic wafer is tight; the package that makes the wafer a product is tighter.

A year on the lead time

A 52-week CoWoS lead is not a price you pay to jump the queue. It is a year in which the board does not exist. HBM sits in the same package. When HBM is tight and CoWoS is tight, you can have a wafer and still not have a GPU. Nvidia, AMD, and the cloud companies that design their own silicon have been living in that queue. New N3 kick-offs described as suspended means even the die behind the package is not a free variable.

TSMC is adding CoWoS as fast as a packaging line can be qualified, which is slower than a press release. Amkor’s ten-year agreement to package and test for TSMC in Arizona ties the US fab story to OSAT capacity that does not yet exist at scale. Until those lines qualify, the queue is in Taiwan. Longtan’s phase three has been reported as a mix of leading-edge fabs and packaging. If that mix is real, TSMC is trying to put the wafer and the stack on the same campus so the queue at least lives in one place. It does not shorten a year for a board already designed. It might shorten 2029.

Car and industrial MCU programmes are not in this boom. They are in the hangover: mature nodes, different packaging, equipment vendors who still quote AI lead times because that is where the tool is going. Sharing a vendor with a CoWoS line is how an auto programme inherits someone else’s shortage. Dual-source the package as well as the die. Qualify it. A second OSAT on a slide is the same error as a second foundry on a slide.

~52 wks
CoWoS lead time, mid-September read
N3
Still fully booked; new kick-offs described as suspended

Hardware companies that freeze SKUs now will ship. Hardware companies that add a variant because a customer asked will join the back of a line they cannot see. Until Arizona’s OSAT is qualified, the allocation meeting is one sentence: the logic wafer is tight; the package that makes the wafer a product is tighter.

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